;
; group_a, test 1
;
; Basic coverage for test boilerplate.  Because this test is designed
; to validate enough capabilities to run boilerplate code, it does not
; use the boilerplate as-is.
;
; Covers:
;
;	br	<disp16>
;	cmpb.eq.16	a,b
;	cmpb.ne.16	a,b
;	copy	a,b
;	copy	b,a
;	16-bit load immediate to register a
;	16-bit load immediate to register b
;	16-bit load immediate to register c
;	exti8 load immediate to register a
; 	exti8 load immediate to register b
;
; NOTE: subtest number is set statically (don't have stores yet)
;	SP is not set
;	calls not performed
;
; NOTE: This code should not be included in composed tests, as it doesn't
;	follow normal conventions.
;
_start:

	; Let's see if we can branch
    br	next0
    halt
    halt
    halt
    halt

	; Should be 1st target, hop again to load immediate tests
next0:

    br	_start_tests	; Go run stuff.
    halt
    halt
    halt
    halt

    ; Data sections to report group, test and subtest number

test_group:
    defb    0x61	; group 'a'
test_num:
    defb    0x01	; test 1
subtest:
    defb    0x01	; subtest 1 (only 1 subtest here)

    halt
    halt
    halt

pass:
	ld.16	c,0xbd10
fail:
	halt

_start_tests:

; Begin test here

    ; Can't rely on much, let's bootstrap ourselves up

    ; Don't know value in any register, but know a==a

    copy    b,a
    cmpb.ne.16	a,b,fail	; Fail if a != a, or if copy b,a failed

    ; Reverse test
    cmpb.eq.16	a,b,next1
    br	fail

next1:
    ; Okay, now let's load some exti8 immediates and test again

    ld.16   a,0x00
    ld.16   b,0x01

    cmpb.eq.16	a,b,fail
    cmpb.ne.16	a,b,next2
    br	fail

    ; Now try equal registers
next2:
    ld.16   a,0x37
    ld.16   b,0x37
    cmpb.ne.16	a,b,fail
    cmpb.eq.16	a,b,next3
    br	fail

    ; Now, with 16-bit immediates
next3:
    ld.16   a,0x1234
    ld.16   b,0x1233
    cmpb.eq.16	a,b,fail
    cmpb.ne.16	a,b,next4
    br	fail

    ; Check 8-bit immediates to make sure don't whack high bits
next4:
    ld.16   a,0xabfd
    ld.16   b,0xab00
    cmpb.eq.16	a,b,fail
    ld.8    b,0xfd
    cmpb.ne.16	a,b,fail
    cmpb.eq.16	a,b,next5
    br	fail

    ; Same, but swap regs
next5:
    ld.16   b,0xabfd
    ld.16   a,0xab00
    cmpb.eq.16	a,b,fail
    ld.8    a,0xfd
    cmpb.ne.16	a,b,fail
    cmpb.eq.16	a,b,next6
    br	fail

    ; Check register copies
next6:
    ld.16   a,0x8080
    ld.16   b,0x0808
    cmpb.eq.16	a,b,fail
    copy    b,a
    cmpb.ne.16	a,b,fail
    ld.16   c,0x8888
    copy    a,c
    cmpb.eq.16	a,b,fail
    copy    a,b	; both a & b 8080, c is 8888
    cmpb.ne.16	a,b,fail
    copy    c,a	; all 8080
    cmpb.ne.16	a,b,fail
    ld.16   a,0x1234
    cmpb.eq.16	a,b,fail
    copy    a,c	; c should be 8080 again
    cmpb.ne.16	a,b,fail

    ; That's enough for now.
    br	pass